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test.tam
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test.tam
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LOADL 0
SUBR IOut
PUSH 1
LOADL 120
STORE (1) 0[SB]
;fr.n7.stl.block.ast.expression.accessible.VariableUse@372f7a8d
LOAD (1) 0[SB]
LOADL 121
SUBR IEq
JUMPIF (0) elseBranch1
LOADL 122
LOADA 0[SB]
STOREI (1)
JUMP endCondition1
elseBranch1:
LOADA 0[SB]
STOREI (1)
;fr.n7.stl.block.ast.expression.accessible.VariableUse@2f92e0f4
debutWhile_2:
LOAD (1) 0[SB]
LOADL 120
SUBR IEq
JUMPIF (0) finWhile_2
JUMP debutWhile_2
finWhile_2:
endCondition1:
PUSH 2
LOADL 15
LOADL 16
STORE (2) 1[SB]
PUSH 1
;fr.n7.stl.block.ast.expression.accessible.VariableUse@28a418fc
LOAD (2) 1[SB]
POP (0) 1
STORE (1) 3[SB]
PUSH 1
;fr.n7.stl.block.ast.expression.accessible.VariableUse@5305068a
LOAD (2) 1[SB]
POP (1) 1
STORE (1) 4[SB]
PUSH 1
LOADL 77
STORE (1) 5[SB]
PUSH 1
LOADL 1
;fr.n7.stl.block.ast.expression.accessible.VariableUse@1f32e575
LOAD (1) 3[SB]
SUBR IAdd
STORE (1) 6[SB]
PUSH 2
LOADL 65
LOADL 180
STORE (2) 7[SB]
PUSH 1
;fr.n7.stl.block.ast.expression.accessible.VariableUse@279f2327
LOAD (2) 7[SB]
POP (0) 1
POP (1) 0
STORE (1) 9[SB]
PUSH 1
LOADL 5
LOADL 1
SUBR IMul
SUBR MAlloc
STORE (1) 10[SB]
PUSH 1
LOADL 1
LOADL 5
LOADL 2
STORE (1) 11[SB]
LOADL 5
LOADA 11[SB]
LOADI (1)
LOADL 1
LOADL 1
SUBR IMul
SUBR IAdd
STOREI (1)
;fr.n7.stl.block.ast.expression.accessible.VariableUse@2ff4acd0
LOAD (1) 11[SB]
LOADL 1
LOADL 1
SUBR IMul
SUBR IAdd
LOADI (1)
SUBR IOut
PUSH 1
LOADL 2
STORE (1) 12[SB]
PUSH 1
LOADA 12[SB]
STORE (1) 13[SB]
LOADL 3
LOADA 13[SB]
LOADI (1)
STOREI (1)
HALT