-
Notifications
You must be signed in to change notification settings - Fork 0
/
cr8044read.pio
76 lines (61 loc) · 1.74 KB
/
cr8044read.pio
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
.program cr8044read
; must match pin_config.h
.define PUBLIC READ_DATA 0
.define PUBLIC READ_CLOCK 1
.define PUBLIC INDEX 2
.define PUBLIC SECTOR 3
.define PUBLIC SERVO_CLOCK 8
wait 1 gpio INDEX
again:
; get gap-a wait iteration count from OSR/TX-FIFO
pull
mov x, osr
gap_a_wait_loop:
wait 1 gpio SERVO_CLOCK ; using SERVO_CLOCK as clock
wait 0 gpio SERVO_CLOCK
jmp x-- gap_a_wait_loop
; get address length from OSR/TX-FIFO
pull
mov x, osr
; enable read
set pins, 1
; wait until SYNC bit in address field
wait 1 gpio READ_DATA
; RE: read timing:
; - READ_DATA changes on 1->0 READ_CLOCK edge
; - The manual advices you to read data on 0->1 READ_CLOCK edge
; see "Figure 3-58. Read PLO and Data Separator timing" in the manual.
; this is important for the read/wait sequence below (`read, wait 0, wait
; 1` caused the first bit to be read twice)
; read address field
address_field_loop:
wait 1 gpio READ_CLOCK ; using READ_CLOCK as clock
in pins, 1 ; ISR <- pins (1 bit)
wait 0 gpio READ_CLOCK
jmp x-- address_field_loop
; disable read
set pins, 0
; get gap-b wait iteration count from OSR/TX-FIFO
pull
mov x, osr
gap_b_wait_loop:
wait 1 gpio SERVO_CLOCK ; using SERVO_CLOCK as clock
wait 0 gpio SERVO_CLOCK
jmp x-- gap_b_wait_loop
; enable read
set pins, 1
; read data field
; get data length from OSR/TX-FIFO
pull
mov x, osr
; wait until SYNC bit in data field
wait 1 gpio READ_DATA
data_field_loop:
wait 1 gpio READ_CLOCK
in pins, 1
wait 0 gpio READ_CLOCK
jmp x-- data_field_loop
; disable read
set pins, 0
wait 1 gpio SECTOR
jmp again