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aut-ca-lab / lab4 Public

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lab4

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full_adder.prj

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5 lines (5 loc) · 128 Bytes

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lab4

/

full_adder.prj

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5 lines (5 loc) · 128 Bytes

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vhdl work "xor_gate.vhd"

vhdl work "and_gate.vhd"

vhdl work "or_gate.vhd"

vhdl work "half_adder.vhd"

vhdl work "full_adder.vhd"

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