- Add OSC IOBUFDS instance to top level VHDL
- Refactor documentation
- Allow setting of a custom Vivado project directory
- Connected the System Management Wizard interrupt to the PS
- Add gigabit transceivers to pinout file
- Added ME-XU8-7EG-2I-D11E product model
- Add I2C PL interface shared with PS I2C
- Doc: New document number
- Changed restriction names for PL memory
- Doc: Added eMMC troubleshoot section
- Disabled PullUps for eMMC IOs
- Fixed temperature limits
- Doc: Corrected links due to new Xilinx website
- Doc: Adjust base_dir with subfolder "reference_design" in description
- Doc: Fix incompatible project name suggestion including a '+'
- Doc: Refer to system instead of application for creating boot image and program flash
- Doc: Updates in troubleshoot section and workarounds
- Doc: Minor optimizations
- Doc: Improve MCT instructions
- Removed VCU as it will be included in the Enclustra Video Application Note
- Doc: Reworded ECC RAM section
- Removed archive containing all binaries (complete*.zip) from release binaries
- Doc: Fixed out of order step-by-step Vivado/Vitis instructions
- Disabled USB reset in PS
- Added Petalinux BSP to release binaries
- Versioning now includes Xilinx tool version
- First release