diff --git a/hardware/tottag/rev_n/README.md b/hardware/tottag/rev_n/README.md
index 3f3a8530..9ed58431 100644
--- a/hardware/tottag/rev_n/README.md
+++ b/hardware/tottag/rev_n/README.md
@@ -2,3 +2,66 @@ Rev N
=====
Draft export, not yet finalized or fab'd
+
+
+Fabrication Notes
+-----------------
+
+> n.b., the .brd file is the authority, this is a convenience copy of the text
+> from the .brd file.
+
+### Stackup
+
+Designed for CircuitHub Std Fab: 4-Layer, 0.6mm
+
+ Order Name Matrl Dscrpt Dielec Thk(mm) CuWgt(oz)
+ 1: Top Copper Signal 0.035 1oz
+ 2116 Prepreg 4.5 0.12
+ 2: Route2 Copper Ground 0.035 1oz
+ FR4 Core 4.6 0.23
+ 3: Route15 Copper Pwr/Gnd 0.12 1oz
+ 2116 Prepreg 4.5 0.12
+ 4: Bottom Copper Sig/Gnd 0.035 1oz
+
+
+### Impedence Control
+
+50Ω for Ultra Wideband RF [5~8 GHz]
+ - Controlled traces run from U2-S2-{-U7-A1,-A2,-S4-A3}
+ — UWB traces are priority signals
+
+50Ω for Ultra Wideband XTal [38.4 MHz]
+ - Controlled traces run from U2-X4-{C3, C4}
+
+50Ω for Bluetooh RF [2.4 GHz]
+ - Controlled traces run from U1-L7-L8-A4
+
+All modeled as Coplanar waveguide.
+
+ SaturnPCB Calculator Configuration:
+ Conductor Width = 0.22 mm (8.7 mil)
+ Conductor Height = 0.12 mm (4.7 mil)
+ Conductor Gap = 0.15 mm (5.9 mil)
+ Er = 4.5
+ [W/H=1.836 < 2, √]
+ Modeled Z = 49.94 Ω
+
+
+### Panelization
+
+Any OK.
+OK to leave mouse bite tabs any edge.
+Designated tab areas are suggestions only, and have no parts or traces.
+
+
+### BGAs and Vias
+
+Parts U1 and U2 are BGAs with 4mm micro vias in pads.
+Okay to plug any/all vias in design.
+Okay to tent any/all vias in design [should already be tented].
+
+
+### Silkscreen
+
+Some legacy parts have silk outlines very close to copper.
+Okay to crop/cut silk aggressively as-needed.
diff --git a/hardware/tottag/rev_n/rev_n v52.brd b/hardware/tottag/rev_n/rev_n v70.brd
similarity index 85%
rename from hardware/tottag/rev_n/rev_n v52.brd
rename to hardware/tottag/rev_n/rev_n v70.brd
index 5699d454..abe0b31f 100644
--- a/hardware/tottag/rev_n/rev_n v52.brd
+++ b/hardware/tottag/rev_n/rev_n v70.brd
@@ -37,13 +37,13 @@
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+
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+
@@ -190,14 +190,14 @@
-TotTag
+TotTag
>REV
-Pat Pannuto
-2024-08
+Pat Pannuto
+2024-09
@@ -650,15 +650,15 @@ Trace width calc's for coplanar wave:
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-Panelization
-Any OK.
+Panelization
+Any OK.
OK to leave mouse bite tabs any edge.
Designated tab areas are suggestions
only, and have no parts or traces.
@@ -1134,7 +1134,7 @@ Order Name Matrl Dscrpt Dielec Thk(mm) CuWgt(oz)
-XXX IGNORE FOR REV-K+ ; UNUSED XXX
+XXX IGNORE FOR REV-K+ ; UNUSED XXX
One 90Ω differential pair USB PHY
- Routed as edge-coupled external
@@ -1144,8 +1144,6 @@ One 90Ω differential pair USB PHY
- Er=4.5
- Modeled Zdiff ~= 90.05 Ω
-Traces U1-P20,P21(Castellations)
-
XXX IGNORE FOR REV-K ; UNUSED XXX
@@ -1290,8 +1288,8 @@ Connection
-trace
-SWD
+trace
+SWD
@@ -1456,10 +1454,10 @@ for tabs
-BGAs and vias
-Parts U1 and U2 are BGAs with
+BGAs and vias
+Parts U1 and U2 are BGAs with
4mm micro vias in pads.
-Okay to plugs any/all vias in design.
+Okay to plug any/all vias in design.
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-8-SON (DFN), 1.27 mm pitch, 6.00 X 8.00 X 0.80 mm body, 3.40 X 4.30 mm thermal pad
- <p>8-pin SON (DFN) package with 1.27mm pitch, with body size 6.00 X 8.00 X 0.80 mm and thermal pad size 3.40 X 4.30 mm</p>
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diff --git a/hardware/tottag/rev_n/rev_n_v24.sch b/hardware/tottag/rev_n/rev_n_v32.sch
similarity index 98%
rename from hardware/tottag/rev_n/rev_n_v24.sch
rename to hardware/tottag/rev_n/rev_n_v32.sch
index 80e99634..e5189f8d 100644
--- a/hardware/tottag/rev_n/rev_n_v24.sch
+++ b/hardware/tottag/rev_n/rev_n_v32.sch
@@ -4414,44 +4414,6 @@ Cream is an estimate.
-
-8-SON (DFN), 1.27 mm pitch, 6.00 X 8.00 X 0.80 mm body, 3.40 X 4.30 mm thermal pad
- <p>8-pin SON (DFN) package with 1.27mm pitch, with body size 6.00 X 8.00 X 0.80 mm and thermal pad size 3.40 X 4.30 mm</p>
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Need to - 2*97.6 = 328Ω
-Reference: Datasheet §7.3.13 TS Resistor Network
+Reference: Datasheet §7.3.13 TS Resistor Network
----
Properties from the BQ51013B datasheet:
Internal to chip (behind TS pad) is a 20kΩ pull-up to 2.2V
@@ -8909,7 +8894,9 @@ Thermistor datasheet values (where does it hit those R's?):
"Safe to touch" std says 60ºC
NTC is 2.97kΩ @ 60ºC
easy shift is add 2kΩ offset to NTC
-now V_COLD trips when NTC is 26.5kΩ (1.8ºC)
+now V_COLD trips when NTC is 26.5kΩ (1.8ºC)
+----
+Rev N: use 2.2kΩ to reduce BOM count
Datasheet wants a 10k NTC B=3370
@@ -8954,11 +8941,11 @@ Guess
small
filter
Fig32 NTC
-Fig32 R1
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+Fig32 R1
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ISET controls constant charge current
Battery wants 0.2C * 1200 mAh = 240 mA
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-SD Card + Sensors
+Flash, 9-DOF, Buzzer
External Flash
9-DOF
Buzzer
-Sup 1.7 - 1.95 V
-Qui 10 µA
-Max 35 mA
- +CS PU 0.2mA
+Sup 1.7 - 1.98 V
+Qui 30 µA
+Max 30 mA
VDD 2.4 - 3.6 V, max 8 mA, qui 0.1 mA
VDDIO 1.7 - 3.6 V, max 7 mA, qui 0.047 mA
Sup 2 - 4 V
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