diff --git a/.gitignore b/.gitignore
index faf318a..7185a46 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,6 +1,7 @@
 *~
 .ninja*
 **/build/*
+drivers/*/thirdparty/
 
 .vscode/settings.json
 
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 1c8404e..ed0e5b6 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -8,7 +8,8 @@
 
 cmake_minimum_required(VERSION 3.13)
 
-set(CMAKE_C_STANDARD 99)
+# set(CMAKE_C_STANDARD 99)
+set(CMAKE_C_STANDARD 11)
 
 # SCHEREMO: Needed to skip compiler test, which doesn't support baremetal targets
 set(CMAKE_C_COMPILER_WORKS 1)
@@ -16,9 +17,6 @@ set(CMAKE_C_COMPILER_WORKS 1)
 set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
 set(CMAKE_VERBOSE_MAKEFILE TRUE)
 
-# SCHEREMO: Help most IDE's LSPs find definitions
-set(CMAKE_EXPORT_COMPILE_COMMANDS 1)
-
 # SCHEREMO: This toolchain file is only used for test compilation!
 set(CMAKE_TOOLCHAIN_FILE cmake/toolchain_llvm.cmake)
 
diff --git a/cmake/opentitan.cmake b/cmake/opentitan.cmake
new file mode 100644
index 0000000..5a78fe2
--- /dev/null
+++ b/cmake/opentitan.cmake
@@ -0,0 +1,111 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Viviane Potocnik <vivianep@iis.ee.ethz.ch>
+
+include(ExternalProject)
+
+# ------------------------------------------------------------------------------
+# Validate prerequisites
+# ------------------------------------------------------------------------------
+if(NOT DEFINED OPENTITAN_COMMIT_HASH)
+  message(FATAL_ERROR "[CHIMERA-SDK] Please set OPENTITAN_COMMIT_HASH in your target.")
+endif()
+
+if(NOT DEFINED OPENTITAN_SPARSE_PATTERNS)
+    message(FATAL_ERROR "[CHIMERA-SDK] Please set OPENTITAN_SPARSE_PATTERNS for your target drivers.")
+endif()
+
+if(NOT DEFINED OPENTITAN_DIR)
+  message(FATAL_ERROR "[CHIMERA-SDK] Please set OPENTITAN_DIR in your target driver.")
+endif()
+
+# ------------------------------------------------------------------------------
+# Write sparse checkout file
+# ------------------------------------------------------------------------------
+set(SPARSE_CHECKOUT_FILE "${CMAKE_CURRENT_BINARY_DIR}/sparse-checkout")
+file(WRITE "${SPARSE_CHECKOUT_FILE}" "")
+foreach(PATTERN ${OPENTITAN_SPARSE_PATTERNS})
+  file(APPEND "${SPARSE_CHECKOUT_FILE}" "${PATTERN}\n")
+endforeach()
+
+# ------------------------------------------------------------------------------
+# Clone logic
+# ------------------------------------------------------------------------------
+if(NOT EXISTS "${OPENTITAN_DIR}/.git")
+  execute_process(
+    COMMAND git clone --no-checkout https://github.com/lowRISC/opentitan.git "${OPENTITAN_DIR}"
+    RESULT_VARIABLE GIT_CLONE_RESULT
+    ERROR_VARIABLE GIT_CLONE_ERROR
+  )
+  if(NOT GIT_CLONE_RESULT EQUAL 0)
+    message(FATAL_ERROR "Failed to clone OpenTitan repository: ${GIT_CLONE_ERROR}")
+  endif()
+else()
+  message(STATUS "[CHIMERA-SDK] OpenTitan repository already exists at ${OPENTITAN_DIR}")
+endif()
+
+# ------------------------------------------------------------------------------
+# Configure sparse checkout
+# ------------------------------------------------------------------------------
+execute_process(
+  COMMAND git -C "${OPENTITAN_DIR}" config core.sparseCheckout true
+  RESULT_VARIABLE GIT_CONFIG_RESULT
+  OUTPUT_VARIABLE GIT_CONFIG_OUTPUT
+)
+
+if(NOT GIT_CONFIG_RESULT EQUAL 0)
+  message(FATAL_ERROR "Failed to configure sparse checkout: ${GIT_CONFIG_OUTPUT}")
+endif()
+
+file(COPY "${SPARSE_CHECKOUT_FILE}" DESTINATION "${OPENTITAN_DIR}/.git/info")
+
+# ------------------------------------------------------------------------------
+# Apply sparse checkout
+# ------------------------------------------------------------------------------
+execute_process(
+  COMMAND git -C "${OPENTITAN_DIR}" read-tree -mu HEAD
+  RESULT_VARIABLE GIT_READ_TREE_RESULT
+  OUTPUT_VARIABLE GIT_READ_TREE_OUTPUT
+)
+
+if(NOT GIT_READ_TREE_RESULT EQUAL 0)
+  message(FATAL_ERROR "Failed to apply sparse checkout: ${GIT_READ_TREE_OUTPUT}")
+endif()
+
+# ------------------------------------------------------------------------------
+# Checkout the desired commit hash
+# ------------------------------------------------------------------------------
+execute_process(
+  COMMAND git -C "${OPENTITAN_DIR}" checkout "${OPENTITAN_COMMIT_HASH}"
+  RESULT_VARIABLE GIT_CHECKOUT_RESULT
+  OUTPUT_VARIABLE GIT_CHECKOUT_OUTPUT
+)
+
+if(NOT GIT_CHECKOUT_RESULT EQUAL 0)
+  message(FATAL_ERROR "Failed to checkout commit ${OPENTITAN_COMMIT_HASH}: ${GIT_CHECKOUT_OUTPUT}")
+endif()
+
+# ------------------------------------------------------------------------------
+# Add OpenTitan as an external project
+# ------------------------------------------------------------------------------
+ExternalProject_Add(
+  opentitan_build_${OPENTITAN_COMMIT_HASH}
+  SOURCE_DIR "${OPENTITAN_DIR}"
+  CONFIGURE_COMMAND ""
+  BUILD_COMMAND ""
+  INSTALL_COMMAND ""
+  BUILD_BYPRODUCTS "${OPENTITAN_DIR}/.git/config"
+  BUILD_ALWAYS 1
+)
+
+add_custom_target(opentitan_target_${OPENTITAN_COMMIT_HASH} ALL
+  DEPENDS opentitan_build_${OPENTITAN_COMMIT_HASH}
+)
+
+# ------------------------------------------------------------------------------
+# Interface target for other targets to depend on
+# ------------------------------------------------------------------------------
+add_library(opentitan_interface_${OPENTITAN_COMMIT_HASH} INTERFACE)
+add_dependencies(opentitan_interface_${OPENTITAN_COMMIT_HASH} opentitan_target_${OPENTITAN_COMMIT_HASH})
diff --git a/cmake/picolibc.cmake b/cmake/picolibc.cmake
new file mode 100644
index 0000000..fd7506f
--- /dev/null
+++ b/cmake/picolibc.cmake
@@ -0,0 +1,64 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Viviane Potocnik <vivianep@iis.ee.ethz.ch>
+
+include(ExternalProject)
+
+message(STATUS "[CHIMERA-SDK] Setting up picolibc for target ${TARGET}")
+
+foreach(var CROSS_C_COMPILER CROSS_C_COMPILER_ARGS CROSS_AR CROSS_STRIP CROSS_CPU CROSS_CPU_FAMILY CROSS_ENDIAN CROSS_SYSTEM CROSS_C_ARGS CROSS_C_LINK_ARGS)
+    if(NOT DEFINED ${var})
+        message(FATAL_ERROR "[CHIMERA-SDK] Variable ${var} is not set. It must be defined before including picolibc.cmake.")
+    endif()
+endforeach()
+
+# Prepare Meson arrays
+function(prepare_meson_array output_var input_string)
+    string(REPLACE " " ";" temp_list "${input_string}")
+    set(formatted_list "")
+    foreach(item IN LISTS temp_list)
+        list(APPEND formatted_list "'${item}'")
+    endforeach()
+    string(JOIN ", " result ${formatted_list})
+    set(${output_var} "${result}" PARENT_SCOPE)
+endfunction()
+
+prepare_meson_array(CROSS_C_COMPILER_ARGS_LIST "${CROSS_C_COMPILER_ARGS}")
+prepare_meson_array(CROSS_C_ARGS_LIST "${CROSS_C_ARGS}")
+prepare_meson_array(CROSS_C_LINK_ARGS_LIST "${CROSS_C_LINK_ARGS}")
+
+set(PICOLIBC_SRC_DIR ${CMAKE_BINARY_DIR}/picolibc-src)
+set(PICOLIBC_BUILD_DIR ${CMAKE_BINARY_DIR}/picolibc-build-${TARGET})
+set(PICOLIBC_INSTALL_DIR ${CMAKE_BINARY_DIR}/picolibc-install-${TARGET})
+set(PICOLIBC_CROSS_FILE ${CMAKE_BINARY_DIR}/picolibc-cross-file-${TARGET}.txt)
+
+
+# Generate the Meson cross-file
+configure_file(${CMAKE_CURRENT_LIST_DIR}/../scripts/picolibc-cross-file.txt.in ${PICOLIBC_CROSS_FILE} @ONLY)
+
+message(STATUS "[CHIMERA-SDK] Saving cross compilation file to ${PICOLIBC_CROSS_FILE}")
+# Add picolibc as an external project
+ExternalProject_Add(
+    picolibc-${TARGET}
+    GIT_REPOSITORY https://github.com/picolibc/picolibc.git
+    GIT_TAG main
+    SOURCE_DIR ${PICOLIBC_SRC_DIR}
+    BINARY_DIR ${PICOLIBC_BUILD_DIR}
+    INSTALL_DIR ${PICOLIBC_INSTALL_DIR}
+    CONFIGURE_COMMAND meson setup ${PICOLIBC_BUILD_DIR} ${PICOLIBC_SRC_DIR} --cross-file ${PICOLIBC_CROSS_FILE} --prefix ${PICOLIBC_INSTALL_DIR} --default-library=static
+    BUILD_COMMAND ninja -C ${PICOLIBC_BUILD_DIR}
+    INSTALL_COMMAND ninja -C ${PICOLIBC_BUILD_DIR} install
+)
+
+set(PICOLIBC_INSTALL_DIR ${PICOLIBC_INSTALL_DIR} PARENT_SCOPE)
+set(PICOLIBC_TARGET picolibc-${TARGET} PARENT_SCOPE)
+
+add_library(picolibc STATIC IMPORTED GLOBAL)
+
+set_target_properties(picolibc PROPERTIES
+    IMPORTED_LOCATION "${PICOLIBC_INSTALL_DIR}/lib/libc.a"
+)
+
+add_dependencies(picolibc picolibc-${TARGET})
\ No newline at end of file
diff --git a/cmake/toolchain_llvm.cmake b/cmake/toolchain_llvm.cmake
index 916f7e7..9bea652 100644
--- a/cmake/toolchain_llvm.cmake
+++ b/cmake/toolchain_llvm.cmake
@@ -20,4 +20,4 @@ set(CMAKE_OBJDUMP ${TOOLCHAIN_DIR}/${LLVM_TAG}-objdump)
 set(CMAKE_AR ${TOOLCHAIN_DIR}/${LLVM_TAG}-ar)
 
 set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} --target=riscv32-unknown-elf")
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} --target=riscv32-unknown-elf")
\ No newline at end of file
+set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} --target=riscv32-unknown-elf")
diff --git a/drivers/CMakeLists.txt b/drivers/CMakeLists.txt
index 4b28bdc..219d355 100644
--- a/drivers/CMakeLists.txt
+++ b/drivers/CMakeLists.txt
@@ -2,13 +2,14 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
+# Viviane Potocnik <vivianep@iis.ee.ethz.ch>
 # Philip Wiese <wiesep@iis.ee.ethz.ch>
 
 # Define mappings for drivers
 set(DRIVER_MAPPINGS
     chimera-convolve:cluster
     chimera-open:cluster
-    chimera-host:
+    chimera-host:uart_opentitan
 )
 
 # Call the macro
diff --git a/drivers/uart_opentitan/CMakeLists.txt b/drivers/uart_opentitan/CMakeLists.txt
new file mode 100644
index 0000000..fef3de7
--- /dev/null
+++ b/drivers/uart_opentitan/CMakeLists.txt
@@ -0,0 +1,101 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Viviane Potocnik <vivianep@iis.ee.ethz.ch>
+
+# ------------------------------------------------------------------------------
+# Set the variables for the OpenTitan UART driver
+# ------------------------------------------------------------------------------
+set(OPENTITAN_DIR "${CMAKE_CURRENT_SOURCE_DIR}/thirdparty/opentitan")
+set(OPENTITAN_SPARSE_PATTERNS
+  "util/design/*"
+  "util/reggen/*"
+  "util/regtool.py"
+  "util/version_file.py"
+  "hw/ip/uart/data/uart.hjson"
+  "sw/device/lib/base/abs_mmio.c"
+  "sw/device/lib/base/abs_mmio.h"
+  "sw/device/lib/base/bitfield.c"
+  "sw/device/lib/base/bitfield.h"
+  "sw/device/lib/base/macros.h"
+  "sw/device/lib/base/math.c"
+  "sw/device/lib/base/math.h"
+  "sw/device/lib/base/math_builtins.c"
+  "sw/device/lib/base/memory.c"
+  "sw/device/lib/base/memory.h"
+  "sw/device/lib/base/mmio.c"
+  "sw/device/lib/base/mmio.h"
+  "sw/device/lib/base/multibits.c"
+  "sw/device/lib/base/multibits.h"
+  "sw/device/lib/base/internal/status.h"
+  "sw/device/lib/base/internal/absl_status.h"
+  "sw/device/lib/dif/dif_base.c"
+  "sw/device/lib/dif/dif_base.h"
+  "sw/device/lib/dif/dif_uart.c"
+  "sw/device/lib/dif/dif_uart.h"
+  "sw/device/lib/dif/autogen/dif_uart_autogen.c"
+  "sw/device/lib/dif/autogen/dif_uart_autogen.h"
+)
+
+# ------------------------------------------------------------------------------
+# Call the OpenTitan driver setup
+# ------------------------------------------------------------------------------
+include(${CMAKE_SOURCE_DIR}/cmake/opentitan.cmake)
+
+# ------------------------------------------------------------------------------
+# Generate the uart_regs.h header using the OT regtool
+# ------------------------------------------------------------------------------
+set(OPENTITAN_SW_DIR   "${OPENTITAN_DIR}/sw")
+set(OPENTITAN_HW_IP_DIR "${OPENTITAN_DIR}/hw/ip")
+set(OPENTITAN_UTIL_DIR  "${OPENTITAN_DIR}/util")
+
+set(REGTOOL_PY  "${OPENTITAN_UTIL_DIR}/regtool.py")
+set(UART_HJSON  "${OPENTITAN_HW_IP_DIR}/uart/data/uart.hjson")
+set(UART_REGS_H "${OPENTITAN_SW_DIR}/device/lib/dif/autogen/uart_regs.h")
+
+
+# Define the output directory
+get_filename_component(UART_REGS_DIR ${UART_REGS_H} DIRECTORY)
+
+# Custom command to generate UART registers header
+add_custom_command(
+  OUTPUT ${UART_REGS_H}
+  COMMAND ${CMAKE_COMMAND} -E make_directory ${UART_REGS_DIR}
+  COMMAND ${Python3_EXECUTABLE} ${REGTOOL_PY} ${UART_HJSON} -D > ${UART_REGS_H}
+  DEPENDS ${REGTOOL_PY} ${UART_HJSON}
+  COMMENT "Generating ${UART_REGS_H} with COMMAND ${Python3_EXECUTABLE} ${REGTOOL_PY} ${UART_HJSON} -D > ${UART_REGS_H}"
+)
+
+# Generate the uart_regs.h header using the OT regtool
+add_custom_target(
+  generate_uart_regs
+  ALL
+  DEPENDS "${UART_REGS_H}"
+)
+
+add_dependencies(generate_uart_regs opentitan_interface_${OPENTITAN_COMMIT_HASH})
+
+# ------------------------------------------------------------------------------
+# Add the UART driver library
+# ------------------------------------------------------------------------------
+add_library(uart_lib STATIC)
+
+file(GLOB_RECURSE UART_SOURCES
+  "${OPENTITAN_SW_DIR}/device/lib/base/*.c"
+  "${OPENTITAN_SW_DIR}/device/lib/dif/*.c"
+)
+
+target_sources(
+  uart_lib
+  PRIVATE
+    ${UART_SOURCES}
+    ${UART_REGS_H}
+)
+
+target_include_directories(
+  uart_lib
+  PUBLIC
+  ${OPENTITAN_DIR}
+  ${OPENTITAN_SW_DIR}/device/lib/dif/autogen
+)
\ No newline at end of file
diff --git a/hal/CMakeLists.txt b/hal/CMakeLists.txt
index c1c6bf3..35c517a 100644
--- a/hal/CMakeLists.txt
+++ b/hal/CMakeLists.txt
@@ -14,3 +14,9 @@ target_include_directories(hal_host
   PUBLIC
   "inc/"
 )
+
+target_link_libraries(hal_host
+  PUBLIC
+    uart_lib
+    picolibc
+)
diff --git a/hal/inc/device_api.h b/hal/inc/device_api.h
index b7a476d..ecbee28 100644
--- a/hal/inc/device_api.h
+++ b/hal/inc/device_api.h
@@ -6,12 +6,32 @@
 
 #include <stdint.h>
 #include <stdio.h>
+#include <stdbool.h>
 
 /**
  * \addtogroup device
  * @{
  */
 
+/**
+ * @brief Device structure.
+ *
+ */
+typedef struct chi_device {
+    /**
+     * @brief Device API.
+     */
+    struct chi_device_api *api; // function pointers
+    /**
+     * @brief Device address.
+     */
+    uint32_t *device_addr;
+    /**
+     * @brief Device configuration.
+     */
+    void *cfg;
+} chi_device_t;
+
 /**
  * @brief Callback function for asynchronous device operations.
  *
@@ -59,23 +79,4 @@ typedef struct chi_device_api {
                            chi_device_callback cb);
 } chi_device_api_t;
 
-/**
- * @brief Device structure.
- *
- */
-typedef struct chi_device {
-    /**
-     * @brief Device API.
-     */
-    struct chi_device_api *api; // function pointers
-    /**
-     * @brief Device address.
-     */
-    uint32_t *device_addr;
-    /**
-     * @brief Device configuration.
-     */
-    void *cfg;
-} chi_device_t;
-
 /** @} */
\ No newline at end of file
diff --git a/hal/inc/uart.h b/hal/inc/uart.h
new file mode 100644
index 0000000..abeb0d0
--- /dev/null
+++ b/hal/inc/uart.h
@@ -0,0 +1,67 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Viviane Potcnik <vivianep@iis.ee.ethz.ch>
+
+#ifndef UART_H
+#define UART_H
+
+#include <stdint.h>
+#include "device_api.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "uart_regs.h"
+#include <stddef.h>
+#include <stdlib.h>
+
+// Parity options
+#define UART_PARITY_NONE 0
+#define UART_PARITY_EVEN 1
+#define UART_PARITY_ODD  2
+
+// Default UART configurations (can be overridden via compiler defines)
+#ifndef UART_DEFAULT_BAUD_RATE
+#define UART_DEFAULT_BAUD_RATE 115200
+#endif
+
+#ifndef UART_DEFAULT_DATA_BITS
+#define UART_DEFAULT_DATA_BITS 8
+#endif
+
+#ifndef UART_DEFAULT_PARITY
+#define UART_DEFAULT_PARITY UART_PARITY_NONE
+#endif
+
+#ifndef UART_DEFAULT_STOP_BITS
+#define UART_DEFAULT_STOP_BITS 1
+#endif
+
+#ifndef UART_CLK_FREQ_HZ
+#define UART_CLK_FREQ_HZ 100000000
+#endif
+
+#ifndef UART_BASE_ADDR
+#define UART_BASE_ADDR 0x40000000
+#endif
+
+// UART configuration structure
+typedef struct {
+    uint32_t baud_rate;
+    uint32_t clk_freq_hz;
+    uint8_t data_bits;
+    uint8_t parity;
+    uint8_t stop_bits;
+} uart_config_t;
+
+// Function declarations
+int uart_open(struct chi_device *device);
+int uart_close(struct chi_device *device);
+ssize_t uart_read_async(struct chi_device *device, void *buffer, uint32_t size, chi_device_callback cb);
+ssize_t uart_write_async(struct chi_device *device, const void *buffer, uint32_t size, chi_device_callback cb);
+
+// Extern the UART API structure
+extern struct chi_device_api uart_api;
+extern uart_config_t default_cfg;
+
+#endif // UART_H
\ No newline at end of file
diff --git a/hal/src/uart.c b/hal/src/uart.c
new file mode 100644
index 0000000..3e9dbf2
--- /dev/null
+++ b/hal/src/uart.c
@@ -0,0 +1,91 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Viviane Potcnik <vivianep@iis.ee.ethz.ch>
+
+#include "uart.h"
+
+// Define the UART API structure
+struct chi_device_api uart_api = {
+    .open = uart_open,
+    .close = uart_close,
+    .read_async = uart_read_async,
+    .write_async = uart_write_async
+};
+
+// UART context structure
+typedef struct uart_context {
+    dif_uart_t uart; // UART DIF handle
+    // Asynchronous read state
+    uint8_t *rx_buffer;
+    uint32_t rx_size;
+    uint32_t rx_pos;
+    chi_device_callback rx_callback;
+    // Asynchronous write state
+    const uint8_t *tx_buffer;
+    uint32_t tx_size;
+    uint32_t tx_pos;
+    chi_device_callback tx_callback;
+} uart_context_t;
+
+// Default UART configuration
+uart_config_t default_cfg = {
+    .baud_rate = UART_DEFAULT_BAUD_RATE,
+    .clk_freq_hz = UART_CLK_FREQ_HZ,
+    .data_bits = UART_DEFAULT_DATA_BITS,
+    .parity    = UART_DEFAULT_PARITY,
+    .stop_bits = UART_DEFAULT_STOP_BITS
+};
+
+int uart_open(struct chi_device *device) {
+    
+    // Check if the device and device address are valid
+    if (device == NULL || device->device_addr == NULL) {
+        return -1; // Invalid argument
+    }
+
+    // Initialize the UART context
+    uart_context_t *ctx = malloc(sizeof(uart_context_t));
+    if (ctx == NULL) {
+        return -2; // Out of memory error
+    }
+    memset(ctx, 0, sizeof(uart_context_t));
+
+    // // If no cfg is provided, use the default configuration
+    // uart_config_t *cfg = device->cfg;
+    // if (cfg == NULL) {
+    //     cfg = &default_cfg;
+    // }
+
+    // free(ctx); // Free the UART context
+
+    return 0; // Success
+}
+
+int uart_close(struct chi_device *device) {
+    
+    if (device == NULL || device->cfg == NULL) {
+        return -1; // Invalid argument
+    }
+
+    return 0; // Success
+}
+
+ssize_t uart_read_async(struct chi_device *device, void *buffer, uint32_t size, chi_device_callback cb) {
+    
+    if (device == NULL || device->cfg == NULL || buffer == NULL || size == 0) {
+        return -1; // Invalid argument
+    }
+
+    return size; // Return the number of bytes to be read
+}
+
+ssize_t uart_write_async(struct chi_device *device, const void *buffer, uint32_t size, chi_device_callback cb) {
+    
+    if (device == NULL || device->cfg == NULL || buffer == NULL || size == 0) {
+        return -1; // Invalid argument
+    }
+
+    return size; // Return the number of bytes to be written
+}
\ No newline at end of file
diff --git a/scripts/picolibc-cross-file.txt.in b/scripts/picolibc-cross-file.txt.in
new file mode 100644
index 0000000..5013a0b
--- /dev/null
+++ b/scripts/picolibc-cross-file.txt.in
@@ -0,0 +1,19 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+[binaries]
+c = [ '@CROSS_C_COMPILER@', @CROSS_C_COMPILER_ARGS_LIST@ ]
+ar = '@CROSS_AR@'
+strip = '@CROSS_STRIP@'
+
+[host_machine]
+system = '@CROSS_SYSTEM@'
+cpu_family = '@CROSS_CPU_FAMILY@'
+cpu = '@CROSS_CPU@'
+endian = '@CROSS_ENDIAN@'
+
+[properties]
+c_args = [ @CROSS_C_ARGS_LIST@ ]
+c_link_args = [ @CROSS_C_LINK_ARGS_LIST@ ]
+skip_sanity_check = @CROSS_SKIP_SANITY_CHECK@
\ No newline at end of file
diff --git a/targets/chimera-host/CMakeLists.txt b/targets/chimera-host/CMakeLists.txt
index 1a7cb65..b0a047c 100644
--- a/targets/chimera-host/CMakeLists.txt
+++ b/targets/chimera-host/CMakeLists.txt
@@ -6,9 +6,39 @@
 # Viviane Potocnik <vivianep@iis.ee.ethz.ch>
 # Philip Wiese <wiesep@iis.ee.ethz.ch>
 
+################################################################################
+# Set up picolibc
+################################################################################
+
+set(TARGET "chimera-host")
+
+set(CROSS_C_COMPILER "clang")
+set(CROSS_AR "llvm-ar")
+set(CROSS_STRIP "llvm-strip")
+set(TARGET_FLAG "riscv32-unknown-elf")
+
+set(CROSS_CPU "riscv32")
+set(CROSS_CPU_FAMILY "riscv32")
+set(CROSS_ENDIAN "little")
+set(CROSS_SYSTEM "none")
+
+set(CROSS_C_COMPILER_ARGS "-target ${TARGET_FLAG} -march=${ISA_HOST} -nostdlib")
+set(CROSS_C_ARGS "-Werror=double-promotion -Wno-unsupported-floating-point-opt -fshort-enums -mno-relax -march=${ISA_HOST} -mabi=${ABI}")
+set(CROSS_C_LINK_ARGS "-Wl,-z,noexecstack -march=${ISA_HOST} -mabi=${ABI}")
+
+set(CROSS_SKIP_SANITY_CHECK "true")
+
+include(${CMAKE_CURRENT_LIST_DIR}/../../cmake/picolibc.cmake)
+
 ################################################################################
 # Host Runtime Library                                                         #
 ################################################################################
+
+# VIVIANEP: Select target-specific commit hash of the OT lib
+set(TARGET_OPENTITAN_COMMIT_HASH 22168a3d42febfca725b36dd0d1554b68cf5783e)
+set(OPENTITAN_COMMIT_HASH ${TARGET_OPENTITAN_COMMIT_HASH} CACHE STRING "OpenTitan commit hash")
+
+
 add_library(runtime_host STATIC)
 
 file(GLOB_RECURSE ASM_SOURCES
@@ -44,6 +74,12 @@ target_compile_options(runtime_host
   -mabi=${ABI}
 )
 
+# VIVIANEP: Must set s
+target_compile_definitions(runtime_host
+  PUBLIC
+  -DOT_PLATFORM_RV32=1
+)
+
 # WIESEP: Export the target specific linkerscript
 target_link_options(runtime_host
   PUBLIC
diff --git a/targets/chimera-host/link.ld b/targets/chimera-host/link.ld
index 6dcf16c..1f639e9 100644
--- a/targets/chimera-host/link.ld
+++ b/targets/chimera-host/link.ld
@@ -39,6 +39,11 @@ SECTIONS {
   . = ALIGN(32);
   __bss_end = .;
 
+  .heap : ALIGN(16) {
+    __heap_start = .;
+    __heap_end = ORIGIN(memisl) + LENGTH(memisl);
+  } > memisl
+
   .bulk : ALIGN(16) {
     *(.bulk)
     *(.bulk.*)
diff --git a/targets/chimera-open/CMakeLists.txt b/targets/chimera-open/CMakeLists.txt
index 57d4cad..c467554 100644
--- a/targets/chimera-open/CMakeLists.txt
+++ b/targets/chimera-open/CMakeLists.txt
@@ -9,8 +9,15 @@
 ################################################################################
 # Host Runtime Library                                                         #
 ################################################################################
+
+# VIVIANEP: Select target-specific commit hash of the OT lib
+set(TARGET_OPENTITAN_COMMIT_HASH 22168a3d42febfca725b36dd0d1554b68cf5783e)
+set(OPENTITAN_COMMIT_HASH ${TARGET_OPENTITAN_COMMIT_HASH} CACHE STRING "OpenTitan commit hash")
+
+
 add_library(runtime_host STATIC)
 
+
 file(GLOB_RECURSE ASM_SOURCES
   "src/crt0.S"
 )
diff --git a/tests/chimera-host/host/CMakeLists.txt b/tests/chimera-host/host/CMakeLists.txt
index 483cc57..b4e7aad 100644
--- a/tests/chimera-host/host/CMakeLists.txt
+++ b/tests/chimera-host/host/CMakeLists.txt
@@ -4,5 +4,7 @@
 #
 # Moritz Scherer <scheremo@iis.ee.ethz.ch>
 # Philip Wiese <wiesep@iis.ee.ethz.ch>
+# Viviane Potocnik <vivianep@iis.ee.ethz.ch>
 
 add_subdirectory(returnZero)
+add_subdirectory(uartSimple)
diff --git a/tests/chimera-host/host/uartSimple/CMakeLists.txt b/tests/chimera-host/host/uartSimple/CMakeLists.txt
new file mode 100644
index 0000000..20631d6
--- /dev/null
+++ b/tests/chimera-host/host/uartSimple/CMakeLists.txt
@@ -0,0 +1,32 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Viviane Potocnik <vivianep@iis.ee.ethz.ch>
+
+set(TEST_NAME test_host_uartSimple)
+
+######## HOST Code #############################################################
+file(GLOB_RECURSE TEST_HOST_SRCS
+  "src_host/*.c"
+)
+
+add_library(${TEST_NAME}_host OBJECT ${TEST_HOST_SRCS})
+# target_include_directories(${TEST_NAME}_host PUBLIC include)
+
+# WIESEP: Set the correct ISA and ABI for the host
+target_compile_options(${TEST_NAME}_host
+  PRIVATE
+  -O2
+)
+target_link_libraries(${TEST_NAME}_host PUBLIC runtime_host hal_host)
+
+######## TEST Executable #######################################################
+add_chimera_test(
+  ${TEST_NAME}
+)
+
+# WIESEP: Link the host to the test executable
+target_link_libraries(${TEST_NAME} PUBLIC ${TEST_NAME}_host)
+
+
diff --git a/tests/chimera-host/host/uartSimple/src_host/test_host.c b/tests/chimera-host/host/uartSimple/src_host/test_host.c
new file mode 100644
index 0000000..e2f981a
--- /dev/null
+++ b/tests/chimera-host/host/uartSimple/src_host/test_host.c
@@ -0,0 +1,23 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Viviane Potcnik <vivianep@iis.ee.ethz.ch>
+
+#include "uart.h"
+
+int main()
+{
+    struct chi_device device;
+    device.api = &uart_api;
+    device.device_addr = (uint32_t *)0x40000000;
+    device.cfg = &default_cfg;
+
+    int open_result = device.api->open(&device);
+    // int close_result = device.api->close(&device);
+
+    // int open_result = 0;
+    int close_result = 0;
+
+    return open_result + close_result;
+}
\ No newline at end of file