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TODO for the paper as of Nov 2023 #118

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mlechu opened this issue Nov 24, 2023 · 0 comments

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mlechu commented Nov 24, 2023

code

software

integration with barrelfish
arm_fastmodels_boot mem management so can allocate translation tables
debug
rust? how well does it work?

hardware

C files for mem access testing
debug translate function
- singlesegment and multisegment first
- simpletable
maybe make tests portable

artifact stuff

enough testing
make sure our collection of vrs files is complete enough, broad variety of features

paper

evaluation

hw/sw core design

can we generate both from the same vrs?
- pick well-known examples (e.g. x86), generate both, run them in fastmodels
ideally, make the generated hw and software components work together

integration into actual os

barrelfish hopefully (kernelspace, userspace)
linux if adventurous

synthesis perf

how long does synthesis take
vary the vrs files and complexity of these
run it a bunch of times

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