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Synchronize the RHash implementation to the latest master branch whic…
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…h is after v1.4.5.

    (rhash/RHash@cf2adf2)
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MouriNaruto committed Nov 30, 2024
1 parent f232141 commit 6b8df84
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Showing 3 changed files with 45 additions and 11 deletions.
3 changes: 3 additions & 0 deletions Documents/ReleaseNotesPreview.md
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,9 @@ For stable versions, please read [NanaZip Release Notes](ReleaseNotes.md).
- Start to simplify the NanaZip specific decoders and encoders implementation.
- Synchronize the BLAKE3 implementation to 1.5.5.
(https://github.com/BLAKE3-team/BLAKE3/releases/tag/1.5.5)
- Synchronize the RHash implementation to the latest master branch which is
after v1.4.5.
(https://github.com/rhash/RHash/commit/cf2adf22ae7c39d9b8e5e7b87222046a8f42b3dc)

**NanaZip 3.5 Preview 0 (3.5.1000.0)**

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16 changes: 16 additions & 0 deletions NanaZip.Codecs/RHash/byte_order.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,22 @@ unsigned rhash_ctz(unsigned x)
# endif /* _MSC_VER >= 1300... */
#endif /* rhash_ctz */

#ifndef rhash_popcount
/**
* Returns the number of 1-bits in x.
*
* @param x the value to process
* @return the number of 1-bits
*/
unsigned rhash_popcount(unsigned x)
{
x -= (x >>1) & 0x55555555;
x = ((x >> 2) & 0x33333333) + (x & 0x33333333);
x = ((x >> 4) + x) & 0x0f0f0f0f;
return (x * 0x01010101) >> 24;
}
#endif /* rhash_popcount */

/**
* Copy a memory block with simultaneous exchanging byte order.
* The byte order is changed from little-endian 32-bit integers
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37 changes: 26 additions & 11 deletions NanaZip.Codecs/RHash/byte_order.h
Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,18 @@ extern "C" {
# define __has_builtin(x) 0
#endif

#ifdef __clang__
# define HAS_CLANG_BUILTIN(x) __has_builtin(x)
#else
# define HAS_CLANG_BUILTIN(x) 0
#endif

#ifdef __GNUC__
# define HAS_GNUC(a, b) (__GNUC__ > a || (__GNUC__ == a && __GNUC_MINOR__ >= b))
#else
# define HAS_GNUC(a, b) 0
#endif

#define IS_ALIGNED_32(p) (0 == (3 & (uintptr_t)(p)))
#define IS_ALIGNED_64(p) (0 == (7 & (uintptr_t)(p)))

Expand Down Expand Up @@ -110,29 +122,33 @@ extern "C" {
#define RHASH_INLINE
#endif

/* define rhash_ctz - count traling zero bits */
#if (defined(__GNUC__) && __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)) || \
(defined(__clang__) && __has_builtin(__builtin_ctz))
/* GCC >= 3.4 or clang */
/* rhash_ctz - count traling zero bits */
#if HAS_GNUC(3, 4) || HAS_CLANG_BUILTIN(__builtin_ctz)
# define rhash_ctz(x) __builtin_ctz(x)
#else
unsigned rhash_ctz(unsigned); /* define as function */
#endif

/* rhash_popcount - count the number of 1-bits */
#if HAS_GNUC(3, 4) || HAS_CLANG_BUILTIN(__builtin_popcount)
# define rhash_popcount(x) __builtin_popcount(x)
#else
unsigned rhash_popcount(unsigned); /* define as function */
#endif

void rhash_swap_copy_str_to_u32(void* to, int index, const void* from, size_t length);
void rhash_swap_copy_str_to_u64(void* to, int index, const void* from, size_t length);
void rhash_swap_copy_u64_to_str(void* to, const void* from, size_t length);
void rhash_u32_mem_swap(unsigned* p, int length_in_u32);

/* bswap definitions */
#if (defined(__GNUC__) && (__GNUC__ >= 4) && (__GNUC__ > 4 || __GNUC_MINOR__ >= 3)) || \
(defined(__clang__) && __has_builtin(__builtin_bswap32) && __has_builtin(__builtin_bswap64))
/* GCC >= 4.3 or clang */
#if HAS_GNUC(4, 3) || \
(HAS_CLANG_BUILTIN(__builtin_bswap32) && HAS_CLANG_BUILTIN(__builtin_bswap64))
# define bswap_32(x) __builtin_bswap32(x)
# define bswap_64(x) __builtin_bswap64(x)
#elif (_MSC_VER > 1300) && (defined(CPU_IA32) || defined(CPU_X64)) /* MS VC */
# define bswap_32(x) _byteswap_ulong((unsigned long)x)
# define bswap_64(x) _byteswap_uint64((__int64)x)
# define bswap_32(x) ((uint32_t)_byteswap_ulong((unsigned long)x))
# define bswap_64(x) ((uint64_t)_byteswap_uint64((__int64)x))
#else
/* fallback to generic bswap definition */
static RHASH_INLINE uint32_t bswap_32(uint32_t x)
Expand Down Expand Up @@ -193,8 +209,7 @@ static RHASH_INLINE uint64_t bswap_64(uint64_t x)

#define CPU_FEATURE_SSE4_2 (52)

#if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) \
&& (defined(CPU_X64) || defined(CPU_IA32))
#if HAS_GNUC(4, 3) && (defined(CPU_X64) || defined(CPU_IA32))
# define HAS_INTEL_CPUID
int has_cpu_feature(unsigned feature_bit);
#else
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