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Add support for 10Mhz clock #4

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Add support for 10Mhz clock #4

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070245d
Add support for 10Mhz clock
Stephen-Bath Aug 7, 2023
06d230b
Add support for 10Mhz clock
Stephen-Bath Aug 7, 2023
2e71c50
Add support for 25Kbps CAN speed
Stephen-Bath Aug 7, 2023
1b4a434
Add support for 25Kbps CAN speed
Stephen-Bath Aug 7, 2023
2e8155a
Add support for hardware reset
Stephen-Bath Aug 7, 2023
796f61b
Add support for hardware reset
Stephen-Bath Aug 7, 2023
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115 changes: 113 additions & 2 deletions include/mcp2515/mcp2515.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ const struct MCP2515::RXBn_REGS MCP2515::RXB[N_RXBUFFERS] = {
{MCP_RXB1CTRL, MCP_RXB1SIDH, MCP_RXB1DATA, CANINTF_RX1IF}
};

MCP2515::MCP2515(spi_inst_t* CHANNEL, uint8_t CS_PIN, uint8_t TX_PIN, uint8_t RX_PIN, uint8_t SCK_PIN, uint32_t SPI_CLOCK)
MCP2515::MCP2515(spi_inst_t* CHANNEL, uint8_t CS_PIN, uint8_t TX_PIN, uint8_t RX_PIN, uint8_t SCK_PIN, uint8_t RST_PIN, uint32_t SPI_CLOCK)
{
this->SPI_CHANNEL = CHANNEL;
spi_init(this->SPI_CHANNEL, SPI_CLOCK);
Expand All @@ -26,6 +26,18 @@ MCP2515::MCP2515(spi_inst_t* CHANNEL, uint8_t CS_PIN, uint8_t TX_PIN, uint8_t RX
gpio_set_dir(this->SPI_CS_PIN, GPIO_OUT);

endSPI();

// Perform a hardware reset if a reset pin has been provided
if (RST_PIN != RST_PIN_NOT_USED) {
gpio_init(RST_PIN);
gpio_set_dir(RST_PIN, GPIO_OUT);

gpio_put(RST_PIN, 0);
sleep_ms(10);

gpio_put(RST_PIN, 1);
sleep_ms(10);
}
}

inline void MCP2515::startSPI() {
Expand Down Expand Up @@ -345,6 +357,105 @@ MCP2515::ERROR MCP2515::setBitrate(const CAN_SPEED canSpeed, CAN_CLOCK canClock)
}
break;

case (MCP_10MHZ):
switch (canSpeed)
{
case (CAN_5KBPS): // 5Kbps
cfg1 = MCP_10MHz_5kBPS_CFG1;
cfg2 = MCP_10MHz_5kBPS_CFG2;
cfg3 = MCP_10MHz_5kBPS_CFG3;
break;

case (CAN_10KBPS): // 10Kbps
cfg1 = MCP_10MHz_10kBPS_CFG1;
cfg2 = MCP_10MHz_10kBPS_CFG2;
cfg3 = MCP_10MHz_10kBPS_CFG3;
break;

case (CAN_20KBPS): // 20Kbps
cfg1 = MCP_10MHz_20kBPS_CFG1;
cfg2 = MCP_10MHz_20kBPS_CFG2;
cfg3 = MCP_10MHz_20kBPS_CFG3;
break;

case (CAN_25KBPS): // 25Kbps
cfg1 = MCP_10MHz_25kBPS_CFG1;
cfg2 = MCP_10MHz_25kBPS_CFG2;
cfg3 = MCP_10MHz_25kBPS_CFG3;
break;

case (CAN_31K25BPS): // 31.25Kbps
cfg1 = MCP_10MHz_31k25BPS_CFG1;
cfg2 = MCP_10MHz_31k25BPS_CFG2;
cfg3 = MCP_10MHz_31k25BPS_CFG3;
break;

case (CAN_33KBPS): // 33.333Kbps
cfg1 = MCP_10MHz_33k3BPS_CFG1;
cfg2 = MCP_10MHz_33k3BPS_CFG2;
cfg3 = MCP_10MHz_33k3BPS_CFG3;
break;

case (CAN_40KBPS): // 40Kbps
cfg1 = MCP_10MHz_40kBPS_CFG1;
cfg2 = MCP_10MHz_40kBPS_CFG2;
cfg3 = MCP_10MHz_40kBPS_CFG3;
break;

case (CAN_50KBPS): // 50Kbps
cfg1 = MCP_10MHz_50kBPS_CFG1;
cfg2 = MCP_10MHz_50kBPS_CFG2;
cfg3 = MCP_10MHz_50kBPS_CFG3;
break;

case (CAN_83K3BPS): // 83.333Kbps
cfg1 = MCP_10MHz_83k3BPS_CFG1;
cfg2 = MCP_10MHz_83k3BPS_CFG2;
cfg3 = MCP_10MHz_83k3BPS_CFG3;
break;

case (CAN_100KBPS): // 100Kbps
cfg1 = MCP_10MHz_100kBPS_CFG1;
cfg2 = MCP_10MHz_100kBPS_CFG2;
cfg3 = MCP_10MHz_100kBPS_CFG3;
break;

case (CAN_125KBPS): // 125Kbps
cfg1 = MCP_10MHz_125kBPS_CFG1;
cfg2 = MCP_10MHz_125kBPS_CFG2;
cfg3 = MCP_10MHz_125kBPS_CFG3;
break;

case (CAN_200KBPS): // 200Kbps
cfg1 = MCP_10MHz_200kBPS_CFG1;
cfg2 = MCP_10MHz_200kBPS_CFG2;
cfg3 = MCP_10MHz_200kBPS_CFG3;
break;

case (CAN_250KBPS): // 250Kbps
cfg1 = MCP_10MHz_250kBPS_CFG1;
cfg2 = MCP_10MHz_250kBPS_CFG2;
cfg3 = MCP_10MHz_250kBPS_CFG3;
break;

case (CAN_500KBPS): // 500Kbps
cfg1 = MCP_10MHz_500kBPS_CFG1;
cfg2 = MCP_10MHz_500kBPS_CFG2;
cfg3 = MCP_10MHz_500kBPS_CFG3;
break;

case (CAN_1000KBPS): // 1Mbps
cfg1 = MCP_10MHz_1000kBPS_CFG1;
cfg2 = MCP_10MHz_1000kBPS_CFG2;
cfg3 = MCP_10MHz_1000kBPS_CFG3;
break;

default:
set = 0;
break;
}
break;

case (MCP_16MHZ):
switch (canSpeed)
{
Expand Down Expand Up @@ -808,4 +919,4 @@ uint8_t MCP2515::errorCountRX(void)
uint8_t MCP2515::errorCountTX(void)
{
return readRegister(MCP_TEC);
}
}
70 changes: 69 additions & 1 deletion include/mcp2515/mcp2515.h
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,69 @@
#define MCP_8MHz_5kBPS_CFG2 (0xBF)
#define MCP_8MHz_5kBPS_CFG3 (0x87)

/*
* speed 10M
*/
#define MCP_10MHz_1000kBPS_CFG1 (0x00)
#define MCP_10MHz_1000kBPS_CFG2 (0xC0)
#define MCP_10MHz_1000kBPS_CFG3 (0x81)

#define MCP_10MHz_500kBPS_CFG1 (0x00)
#define MCP_10MHz_500kBPS_CFG2 (0xC9)
#define MCP_10MHz_500kBPS_CFG3 (0x84)

#define MCP_10MHz_250kBPS_CFG1 (0x00)
#define MCP_10MHz_250kBPS_CFG2 (0xEC)
#define MCP_10MHz_250kBPS_CFG3 (0x87)

#define MCP_10MHz_200kBPS_CFG1 (0x00)
#define MCP_10MHz_200kBPS_CFG2 (0xFF)
#define MCP_10MHz_200kBPS_CFG3 (0x87)

#define MCP_10MHz_125kBPS_CFG1 (0x01)
#define MCP_10MHz_125kBPS_CFG2 (0xEC)
#define MCP_10MHz_125kBPS_CFG3 (0x87)

#define MCP_10MHz_100kBPS_CFG1 (0x01)
#define MCP_10MHz_100kBPS_CFG2 (0xFF)
#define MCP_10MHz_100kBPS_CFG3 (0x87)

#define MCP_10MHz_83k3BPS_CFG1 (0x02)
#define MCP_10MHz_83k3BPS_CFG2 (0xEC)
#define MCP_10MHz_83k3BPS_CFG3 (0x87)

#define MCP_10MHz_50kBPS_CFG1 (0x03)
#define MCP_10MHz_50kBPS_CFG2 (0xFF)
#define MCP_10MHz_50kBPS_CFG3 (0x87)

#define MCP_10MHz_40kBPS_CFG1 (0x04)
#define MCP_10MHz_40kBPS_CFG2 (0xFF)
#define MCP_10MHz_40kBPS_CFG3 (0x87)

#define MCP_10MHz_33k3BPS_CFG1 (0x05)
#define MCP_10MHz_33k3BPS_CFG2 (0xFF)
#define MCP_10MHz_33k3BPS_CFG3 (0x87)

#define MCP_10MHz_31k25BPS_CFG1 (0x07)
#define MCP_10MHz_31k25BPS_CFG2 (0xEC)
#define MCP_10MHz_31k25BPS_CFG3 (0x87)

#define MCP_10MHz_25kBPS_CFG1 (0x07)
#define MCP_10MHz_25kBPS_CFG2 (0xFF)
#define MCP_10MHz_25kBPS_CFG3 (0x87)

#define MCP_10MHz_20kBPS_CFG1 (0x09)
#define MCP_10MHz_20kBPS_CFG2 (0xFF)
#define MCP_10MHz_20kBPS_CFG3 (0x87)

#define MCP_10MHz_10kBPS_CFG1 (0x13)
#define MCP_10MHz_10kBPS_CFG2 (0xFF)
#define MCP_10MHz_10kBPS_CFG3 (0x87)

#define MCP_10MHz_5kBPS_CFG1 (0x27)
#define MCP_10MHz_5kBPS_CFG2 (0xFF)
#define MCP_10MHz_5kBPS_CFG3 (0x87)

/*
* speed 16M
*/
Expand Down Expand Up @@ -176,13 +239,15 @@
enum CAN_CLOCK {
MCP_20MHZ,
MCP_16MHZ,
MCP_10MHZ,
MCP_8MHZ
};

enum CAN_SPEED {
CAN_5KBPS,
CAN_10KBPS,
CAN_20KBPS,
CAN_25KBPS,
CAN_31K25BPS,
CAN_33KBPS,
CAN_40KBPS,
Expand Down Expand Up @@ -265,6 +330,8 @@ class MCP2515 {
EFLG_EWARN = (1<<0)
};

static const uint8_t RST_PIN_NOT_USED = 0; // 0 denotes that the reset pin is not used

private:
static const uint8_t CANCTRL_REQOP = 0xE0;
static const uint8_t CANCTRL_ABAT = 0x10;
Expand Down Expand Up @@ -471,6 +538,7 @@ class MCP2515 {
uint8_t TX_PIN = PICO_DEFAULT_SPI_TX_PIN,
uint8_t RX_PIN = PICO_DEFAULT_SPI_RX_PIN,
uint8_t SCK_PIN = PICO_DEFAULT_SPI_SCK_PIN,
uint8_t PST_PIN = RST_PIN_NOT_USED,
uint32_t _SPI_CLOCK = DEFAULT_SPI_CLOCK
);
ERROR reset(void);
Expand Down Expand Up @@ -504,4 +572,4 @@ class MCP2515 {
uint8_t errorCountTX(void);
};

#endif
#endif