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Issues list

Does RISCV-DV fully support RVA23 profiles?
#996 opened Dec 24, 2024 by Popebl
Need to check Verible Version in build-verible.sh
#994 opened Nov 16, 2024 by Ashwin4514
Generation of multi-hart tests with virtual memory enabled
#993 opened Nov 11, 2024 by Wlgen
how to regenerate src SV classes after modifying scripts in riscv-dv/pygen/pygen-src/*py
#992 opened Oct 30, 2024 by svasekar
Understanding the Role of UVM and Circuit Simulators
#990 opened Aug 13, 2024 by mutianzh
1
Error: illegal operands `sd s11,sub_4_stack_p(s5)'
#986 opened Jul 9, 2024 by il-steffen
1
Can I run this without install any external library?
#982 opened Jun 18, 2024 by kjhhgt76
Can riscv-dv used with ucb rocket core/boom core?
#979 opened May 15, 2024 by Sai-Manish
6
Request for detailed documentation
#978 opened May 13, 2024 by fangzhigang32
1
Initial mret (from init_supervisor_mode) sends processor to untranslated address
#977 opened May 8, 2024 by talhashahzad12345
Randomize CSR in main
#976 opened Apr 24, 2024 by predator-111
6
Can't do S-mode test ( No delegation )
#975 opened Apr 13, 2024 by AhmedAmrAbdellatif1
3
Guide lines to enable virtual address translation?
#974 opened Mar 27, 2024 by mukesh891
How to test Atomic Extension?
#973 opened Mar 20, 2024 by AhmedAmrAbdellatif1
3
can't do riscv_csr_test
#972 opened Feb 28, 2024 by AhmedAmrAbdellatif1
1
Access Exception error while running spike for rv64imac instructions
#971 opened Feb 19, 2024 by omanzoor
How to connect the test to my SV design file, and How do I get the feedback that the test has passed or failed?
#970 opened Feb 7, 2024 by AhmedAmrAbdellatif1
1
Error "SolveBeforeMustBeRand" while Elaborating with Dsim tool
#967 opened Feb 5, 2024 by magnetworks
2
Circular dependency within source files
#966 opened Jan 11, 2024 by yesilzeytin
riscv-dv breaks with riscv64-unknown-elf-gcc version tags 2023.04.18 and up
#964 opened Nov 24, 2023 by 5hayanB
5
rv64gc failing spike due to exception trap_store_address_misaligned
#963 opened Oct 19, 2023 by kevinhe5
2
The spike simulation gets stuck in an endless loop
#962 opened Oct 11, 2023 by riscv1111
2
spike
#961 opened Oct 10, 2023 by riscv1111
use ovpsim .Why is there no verbose log instruction
#958 opened Oct 7, 2023 by moyouth
5
Instruction Address Misalign Exception
#957 opened Sep 26, 2023 by bmverma
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