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Issues list

Iterelf flag support enhancement New feature or request
#1181 opened Dec 9, 2024 by jordancarlin
VCS fcov false support
#1179 opened Dec 7, 2024 by jordancarlin
Questa VCD dump not generating correctly bug Something isn't working
#1178 opened Dec 7, 2024 by jordancarlin
UART slows down bug Something isn't working
#1170 opened Dec 2, 2024 by splinedrive
Deprecated files?
#1163 opened Dec 2, 2024 by jordancarlin
1 of 2 tasks
Possible spi_fifo.sv bug
#1139 opened Nov 25, 2024 by rosethompson
Wally on Genesys 2 FPGA board? enhancement New feature or request
#1086 opened Nov 12, 2024 by matsbror
Unexplained extra bit in FMA data path enhancement New feature or request
#970 opened Sep 29, 2024 by davidharrishmc
Concurrent HPTW access fault with IFU bus fetch enhancement New feature or request
#845 opened Jun 19, 2024 by rosethompson
Possible optimization: tlbcamline.sv enhancement New feature or request
#844 opened Jun 19, 2024 by rosethompson
More tests in nightly regression enhancement New feature or request
#779 opened May 6, 2024 by davidharrishmc
Remove flush from EBU critical path enhancement New feature or request
#771 opened May 2, 2024 by davidharrishmc
Testfloat on Verilator not progressing enhancement New feature or request
#707 opened Apr 4, 2024 by davidharrishmc
RAS return after return bug enhancement New feature or request
#610 opened Feb 1, 2024 by rosethompson
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