release v4.16-7

CHANGELOG.md

@@ -1,3 +1,7 @@
+v4.16-5 2018-05-07
+--------------------
+Upgrade to v4.16.7
+
 v4.16-5 2018-04-19
 --------------------
 Upgrade to v4.16.3

aur/PKGBUILD

@@ -2,7 +2,7 @@
 
 pkgbase=linux-samus4
 pkgver=4.16
-pkgrel=5
+pkgrel=7
 arch=('x86_64')
 url="https://github.com/raphael/linux-samus"
 license=('GPL2')

build/linux-4.16.8-ph_4.16.8-ph-81.dsc

@@ -0,0 +1,21 @@
+Format: 3.0 (quilt)
+Source: linux-4.16.8-ph
+Binary: linux-image-4.16.8-ph, linux-headers-4.16.8-ph, linux-libc-dev
+Architecture: any
+Version: 4.16.8-ph-81
+Maintainer: Anonymous <root@chromia>
+Homepage: http://www.kernel.org/
+Build-Depends: bc, kmod, cpio
+Package-List:
+ linux-headers-4.16.8-ph deb kernel optional arch=any
+ linux-image-4.16.8-ph deb kernel optional arch=any
+ linux-libc-dev deb devel optional arch=any
+Checksums-Sha1:
+ 5673c7d65584150bb7e440bc5eafb126b19cce55 502574592 linux-4.16.8-ph_4.16.8-ph.orig.tar.gz
+ 3ad579506e1e5a4020a1dcff6950c4b3ef9145c6 1207 linux-4.16.8-ph_4.16.8-ph-81.debian.tar.gz
+Checksums-Sha256:
+ e8a41f48085454e1a367586285e8508d8ab5babb5d966486c2834333f649aa49 502574592 linux-4.16.8-ph_4.16.8-ph.orig.tar.gz
+ 54443724e52a9f680732c36680b398d6c06d8742d58e687d7be56036b4cbef75 1207 linux-4.16.8-ph_4.16.8-ph-81.debian.tar.gz
+Files:
+ 1c76b224a2eb3451e1dc73c3fc8c8267 502574592 linux-4.16.8-ph_4.16.8-ph.orig.tar.gz
+ 77154b13e1216eb1eb3b2f2b2ce86580 1207 linux-4.16.8-ph_4.16.8-ph-81.debian.tar.gz

build/linux-4.16.8-ph_4.16.8-ph-81_amd64.changes

@@ -0,0 +1,39 @@
+Format: 1.8
+Date: Fri, 11 May 2018 00:43:48 -0700
+Source: linux-4.16.8-ph
+Binary: linux-image-4.16.8-ph linux-headers-4.16.8-ph linux-libc-dev
+Architecture: source amd64
+Version: 4.16.8-ph-81
+Distribution: vivid
+Urgency: low
+Maintainer: Anonymous <root@chromia>
+Changed-By: Anonymous <root@chromia>
+Description:
+ linux-headers-4.16.8-ph - Linux kernel headers for 4.16.8-ph on ${kernel:debarch}
+ linux-image-4.16.8-ph - Linux kernel, version 4.16.8-ph
+ linux-libc-dev - Linux support headers for userspace development
+Changes:
+ linux-4.16.8-ph (4.16.8-ph-81) vivid; urgency=low
+ .
+   * Custom built Linux kernel.
+Checksums-Sha1:
+ 8d90dfb2317ccac16895c30a4abedeab2c6aabf6 1032 linux-4.16.8-ph_4.16.8-ph-81.dsc
+ 5673c7d65584150bb7e440bc5eafb126b19cce55 502574592 linux-4.16.8-ph_4.16.8-ph.orig.tar.gz
+ 3ad579506e1e5a4020a1dcff6950c4b3ef9145c6 1207 linux-4.16.8-ph_4.16.8-ph-81.debian.tar.gz
+ 09fb49836d949ce936a7dc9e41648e2d928028f5 11614892 linux-headers-4.16.8-ph_4.16.8-ph-81_amd64.deb
+ 2bec65a3cd737859b2163ccaabf0ddf697bfa6f6 54679480 linux-image-4.16.8-ph_4.16.8-ph-81_amd64.deb
+ 6b314a6db164b620a96d9c494733d779379b655c 985468 linux-libc-dev_4.16.8-ph-81_amd64.deb
+Checksums-Sha256:
+ 1a442f6874e108a831ec2a3f49287630103e7463920facc3ef33692441abfec2 1032 linux-4.16.8-ph_4.16.8-ph-81.dsc
+ e8a41f48085454e1a367586285e8508d8ab5babb5d966486c2834333f649aa49 502574592 linux-4.16.8-ph_4.16.8-ph.orig.tar.gz
+ 54443724e52a9f680732c36680b398d6c06d8742d58e687d7be56036b4cbef75 1207 linux-4.16.8-ph_4.16.8-ph-81.debian.tar.gz
+ c273cff70a93a72310fefabe2754837d3a2df75c2c5b500d5eb3c195e196131c 11614892 linux-headers-4.16.8-ph_4.16.8-ph-81_amd64.deb
+ 580bf2efc0b492a4f4ee6aa793eced5bb3d7ebe78ca65c8885532021406d746b 54679480 linux-image-4.16.8-ph_4.16.8-ph-81_amd64.deb
+ 24ca248cc50385c55d48be0cdcfe9397a665d3d35e2a834728a90dc2e0f5fedb 985468 linux-libc-dev_4.16.8-ph-81_amd64.deb
+Files:
+ 6dfb617884b245fff15f03b142f5c766 1032 kernel optional linux-4.16.8-ph_4.16.8-ph-81.dsc
+ 1c76b224a2eb3451e1dc73c3fc8c8267 502574592 kernel optional linux-4.16.8-ph_4.16.8-ph.orig.tar.gz
+ 77154b13e1216eb1eb3b2f2b2ce86580 1207 kernel optional linux-4.16.8-ph_4.16.8-ph-81.debian.tar.gz
+ 56cf59e8312329957673d922d73fcec3 11614892 kernel optional linux-headers-4.16.8-ph_4.16.8-ph-81_amd64.deb
+ 066599e6fa41806c4edd8de0b169f695 54679480 kernel optional linux-image-4.16.8-ph_4.16.8-ph-81_amd64.deb
+ 0843975cd27f5db8306b4734b692697c 985468 devel optional linux-libc-dev_4.16.8-ph-81_amd64.deb

build/linux/Documentation/arm64/silicon-errata.txt

@@ -55,6 +55,7 @@ stable kernels.
 | ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220        |
 | ARM            | Cortex-A72      | #853709         | N/A                         |
 | ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |
+| ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |
 | ARM            | MMU-500         | #841119,#826419 | N/A                         |
 |                |                 |                 |                             |
 | Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375        |

build/linux/Documentation/networking/ip-sysctl.txt

@@ -1386,26 +1386,26 @@ mld_qrv - INTEGER
 	Default: 2 (as specified by RFC3810 9.1)
 	Minimum: 1 (as specified by RFC6636 4.5)
 
-max_dst_opts_cnt - INTEGER
+max_dst_opts_number - INTEGER
 	Maximum number of non-padding TLVs allowed in a Destination
 	options extension header. If this value is less than zero
 	then unknown options are disallowed and the number of known
 	TLVs allowed is the absolute value of this number.
 	Default: 8
 
-max_hbh_opts_cnt - INTEGER
+max_hbh_opts_number - INTEGER
 	Maximum number of non-padding TLVs allowed in a Hop-by-Hop
 	options extension header. If this value is less than zero
 	then unknown options are disallowed and the number of known
 	TLVs allowed is the absolute value of this number.
 	Default: 8
 
-max dst_opts_len - INTEGER
+max_dst_opts_length - INTEGER
 	Maximum length allowed for a Destination options extension
 	header.
 	Default: INT_MAX (unlimited)
 
-max hbh_opts_len - INTEGER
+max_hbh_length - INTEGER
 	Maximum length allowed for a Hop-by-Hop options extension
 	header.
 	Default: INT_MAX (unlimited)

build/linux/Documentation/virtual/kvm/api.txt

@@ -1960,6 +1960,9 @@ ARM 32-bit VFP control registers have the following id bit patterns:
 ARM 64-bit FP registers have the following id bit patterns:
   0x4030 0000 0012 0 <regno:12>
 
+ARM firmware pseudo-registers have the following bit pattern:
+  0x4030 0000 0014 <regno:16>
+
 
 arm64 registers are mapped using the lower 32 bits. The upper 16 of
 that is the register group type, or coprocessor number:
@@ -1976,6 +1979,9 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value:
 arm64 system registers have the following id bit patterns:
   0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>
 
+arm64 firmware pseudo-registers have the following bit pattern:
+  0x6030 0000 0014 <regno:16>
+
 
 MIPS registers are mapped using the lower 32 bits.  The upper 16 of that is
 the register group type:
@@ -2510,7 +2516,8 @@ Possible features:
 	  and execute guest code when KVM_RUN is called.
 	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.
 	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).
-	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.
+	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision
+          backward compatible with v0.2) for the CPU.
 	  Depends on KVM_CAP_ARM_PSCI_0_2.
 	- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.
 	  Depends on KVM_CAP_ARM_PMU_V3.

build/linux/Documentation/virtual/kvm/arm/psci.txt

@@ -0,0 +1,30 @@
+KVM implements the PSCI (Power State Coordination Interface)
+specification in order to provide services such as CPU on/off, reset
+and power-off to the guest.
+
+The PSCI specification is regularly updated to provide new features,
+and KVM implements these updates if they make sense from a virtualization
+point of view.
+
+This means that a guest booted on two different versions of KVM can
+observe two different "firmware" revisions. This could cause issues if
+a given guest is tied to a particular PSCI revision (unlikely), or if
+a migration causes a different PSCI version to be exposed out of the
+blue to an unsuspecting guest.
+
+In order to remedy this situation, KVM exposes a set of "firmware
+pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
+interface. These registers can be saved/restored by userspace, and set
+to a convenient value if required.
+
+The following register is defined:
+
+* KVM_REG_ARM_PSCI_VERSION:
+
+  - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
+    (and thus has already been initialized)
+  - Returns the current PSCI version on GET_ONE_REG (defaulting to the
+    highest PSCI version implemented by KVM and compatible with v0.2)
+  - Allows any PSCI version implemented by KVM and compatible with
+    v0.2 to be set with SET_ONE_REG
+  - Affects the whole VM (even if the register view is per-vcpu)

build/linux/Makefile

@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 VERSION = 4
 PATCHLEVEL = 16
-SUBLEVEL = 3
+SUBLEVEL = 8
 EXTRAVERSION =
 LOCALVERSION =
 NAME = Fearless Coyote

build/linux/arch/arm/boot/dts/at91sam9g25.dtsi

@@ -21,7 +21,7 @@
 				atmel,mux-mask = <
 				      /*    A         B          C     */
 				       0xffffffff 0xffe0399f 0xc000001c  /* pioA */
-				       0x0007ffff 0x8000fe3f 0x00000000  /* pioB */
+				       0x0007ffff 0x00047e3f 0x00000000  /* pioB */
 				       0x80000000 0x07c0ffff 0xb83fffff  /* pioC */
 				       0x003fffff 0x003f8000 0x00000000  /* pioD */
 				      >;

build/linux/arch/arm/boot/dts/exynos5250.dtsi

@@ -655,7 +655,7 @@
 			power-domains = <&pd_gsc>;
 			clocks = <&clock CLK_GSCL0>;
 			clock-names = "gscl";
-			iommu = <&sysmmu_gsc0>;
+			iommus = <&sysmmu_gsc0>;
 		};
 
 		gsc_1:  gsc@13e10000 {
@@ -665,7 +665,7 @@
 			power-domains = <&pd_gsc>;
 			clocks = <&clock CLK_GSCL1>;
 			clock-names = "gscl";
-			iommu = <&sysmmu_gsc1>;
+			iommus = <&sysmmu_gsc1>;
 		};
 
 		gsc_2:  gsc@13e20000 {
@@ -675,7 +675,7 @@
 			power-domains = <&pd_gsc>;
 			clocks = <&clock CLK_GSCL2>;
 			clock-names = "gscl";
-			iommu = <&sysmmu_gsc2>;
+			iommus = <&sysmmu_gsc2>;
 		};
 
 		gsc_3:  gsc@13e30000 {
@@ -685,7 +685,7 @@
 			power-domains = <&pd_gsc>;
 			clocks = <&clock CLK_GSCL3>;
 			clock-names = "gscl";
-			iommu = <&sysmmu_gsc3>;
+			iommus = <&sysmmu_gsc3>;
 		};
 
 		hdmi: hdmi@14530000 {

build/linux/arch/arm/boot/dts/gemini-nas4220b.dts

@@ -134,37 +134,37 @@
 						function = "gmii";
 						groups = "gmii_gmac0_grp";
 					};
-					/* Settings come from OpenWRT */
+					/* Settings come from OpenWRT, pins on SL3516 */
 					conf0 {
-						pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
+						pins = "V8 GMAC0 RXDV", "T10 GMAC1 RXDV";
 						skew-delay = <0>;
 					};
 					conf1 {
-						pins = "T8 GMAC0 RXC", "T11 GMAC1 RXC";
+						pins = "Y7 GMAC0 RXC", "Y11 GMAC1 RXC";
 						skew-delay = <15>;
 					};
 					conf2 {
-						pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
+						pins = "T8 GMAC0 TXEN", "W11 GMAC1 TXEN";
 						skew-delay = <7>;
 					};
 					conf3 {
-						pins = "V7 GMAC0 TXC";
+						pins = "U8 GMAC0 TXC";
 						skew-delay = <11>;
 					};
 					conf4 {
-						pins = "P10 GMAC1 TXC";
+						pins = "V11 GMAC1 TXC";
 						skew-delay = <10>;
 					};
 					conf5 {
 						/* The data lines all have default skew */
-						pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
-						       "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
-						       "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
-						       "R7 GMAC0 TXD2", "P7 GMAC0 TXD3",
-						       "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
-						       "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
-						       "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
-						       "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
+						pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
+						       "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
+						       "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
+						       "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
+						       "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
+						       "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
+						       "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
+						       "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
 						skew-delay = <7>;
 					};
 					/* Set up drive strength on GMAC0 to 16 mA */

build/linux/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts

@@ -39,6 +39,24 @@
 		};
 	};
 
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_5v: regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
 	gpio_keys {
 		compatible = "gpio-keys";
 		pinctrl-names = "default";
@@ -468,12 +486,14 @@
 };
 
 &usb1 {
-	vusb33-supply = <&mt6323_vusb_reg>;
+	vusb33-supply = <&reg_3p3v>;
+	vbus-supply = <&reg_5v>;
 	status = "okay";
 };
 
 &usb2 {
-	vusb33-supply = <&mt6323_vusb_reg>;
+	vusb33-supply = <&reg_3p3v>;
+	vbus-supply = <&reg_5v>;
 	status = "okay";
 };
 

build/linux/arch/arm/boot/dts/sama5d4.dtsi

@@ -1379,7 +1379,7 @@
 			pinctrl@fc06a000 {
 				#address-cells = <1>;
 				#size-cells = <1>;
-				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
+				compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
 				ranges = <0xfc068000 0xfc068000 0x100
 					  0xfc06a000 0xfc06a000 0x4000>;
 				/* WARNING: revisit as pin spec has changed */

build/linux/arch/arm/configs/socfpga_defconfig

@@ -57,6 +57,7 @@ CONFIG_MTD_M25P80=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_DENALI_DT=y
 CONFIG_MTD_SPI_NOR=y
+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
 CONFIG_SPI_CADENCE_QUADSPI=y
 CONFIG_OF_OVERLAY=y
 CONFIG_OF_CONFIGFS=y

build/linux/arch/arm/include/asm/kvm_host.h

@@ -77,6 +77,9 @@ struct kvm_arch {
 	/* Interrupt controller */
 	struct vgic_dist	vgic;
 	int max_vcpus;
+
+	/* Mandated version of PSCI */
+	u32 psci_version;
 };
 
 #define KVM_NR_MEM_OBJS     40

build/linux/arch/arm/include/uapi/asm/kvm.h

@@ -186,6 +186,12 @@ struct kvm_arch_memory_slot {
 #define KVM_REG_ARM_VFP_FPINST		0x1009
 #define KVM_REG_ARM_VFP_FPINST2		0x100A
 
+/* KVM-as-firmware specific pseudo-registers */
+#define KVM_REG_ARM_FW			(0x0014 << KVM_REG_ARM_COPROC_SHIFT)
+#define KVM_REG_ARM_FW_REG(r)		(KVM_REG_ARM | KVM_REG_SIZE_U64 | \
+					 KVM_REG_ARM_FW | ((r) & 0xffff))
+#define KVM_REG_ARM_PSCI_VERSION	KVM_REG_ARM_FW_REG(0)
+
 /* Device Control API: ARM VGIC */
 #define KVM_DEV_ARM_VGIC_GRP_ADDR	0
 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS	1